High Speed and High Density Video FIFO supports you to Face the 4K Era
AverLogic AL462 Webinar

Webinar: High Speed and High Density Video FIFO Memory and How to Face the 4K Era

  • Date: Wednesday 26th of April
  • Taiwan Time: 10:00 to 10:40am
  • San Francisco Time: 11:00 to 11:40 am
  • Berlin Time: 5:00 to 5:40 pm
  • Speaker: John Lin, Video Chip Industry Consultant
  • Language: English
  • Target audiences: hardware system architects, hardware designers, product managers and product developers

FPGAs are well-placed to meet demands for flexibility, time-to-market and efficiency in the 4K Era. This webinar will provide you all you need to know about our 4K UHD Memory Buffer, AL462, and how can help you in your FPGA Design.

Using AL462 you will:

  • Reduce risk
  • Shorten the design schedule
  • Enable early software development
  • Allow real time system verification
  • Boost reliability
  • Increase design flexibility

John Lin has over 10 years of experience in Video FIFO memory. He will answer the following:

  • Which are the main challenges of Digital Video Signals Design?
  • How can AL462 help your FPGA Design?
  • Averlogic’s Product Comparison Chart
  • Which are AL462 main applications?

More info about AL462 here.

This webinar is free in case that you are interested but you can't attend it, please contact us.


Averlogic Sales Department

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